VHDL for designers / Stefan Sjoholm and Lennart Lindh.
Material type: TextPublication details: London ; New York : Prentice Hall, 1997.Description: xv, 473 p. : ill. ; 25 cmISBN:- 0134734149
- 621.392 SJO
Item type | Current library | Call number | Copy number | Status | Date due | Barcode | |
---|---|---|---|---|---|---|---|
Standard Loan | Moylish Library Main Collection | 621.392 SJO (Browse shelf(Opens below)) | 2 | Available | 39002000224668 |
Enhanced descriptions from Syndetics:
The specific goal of VHDL for Designers is not only to teach VHDL but also to describe how to use VHDL when designing an electronic system with modern design tools. The synthesis tools Synopsys, Mentor Graphics and ViewLogic are used.
Includes bibliographical references and index.
Table of contents provided by Syndetics
- Preface
- 1 Introduction to VHDL Concurrent VHDL
- 2 Sequential VHDL
- 3 Libnrary
- 4 Package and Subprograms
- 5 Structural VHDL
- 6 RAM and ROM
- 7 Testbench
- 8 State Machines
- 9 RTL Synthesis
- 10 Design Methodology
- 11 Test Methodology
- 13 Common Design Errors in VHDL and How to Avoid them
- 14 Design Examples and Design Tips
- 15 Development Tools
- 16 Behavioural Synthesis
- 17 Laboratories
- 18 Answers